Principal RFIC / Analog / Mixed-Signal IC Design Contractor / Architect | GNSS, NFC, PMIC, EDA | SoC Architecture → Tapeout | 20+ yrs Semiconductor Industry | FDSOI / CMOS | Independent Consultant / B2B / Remote | Ph.D.

RFIC / Analog IC architect and principal designer with over 20 years of experience in the semiconductor industry, Ph.D. in EE.

My work spans the full IC development lifecycle: from system architecture and circuit design to silicon validation and production. I have contributed to several high-volume semiconductor products, including some of the first NFC contactless payment chips used worldwide.

Core expertise includes RF front-ends, mixed-signal SoC integration, and precision analog blocks in advanced CMOS and FD-SOI technologies.

Highlights:

• Architecture and design of RF front-ends (LNA, mixers, baluns)

• PMIC and precision analog blocks (bandgap, LDO, DC-DC)

• Full chip integration and tape-out sign-off (I/O, ESD)

• Tapeouts across nodes from 0.8 µm CMOS/BiCMOS to 10 nm FD-SOI

• Co-founder and technical leader of a semiconductor startup

• Contributor to GNSS navigation receiver SoCs

• Early developer of NFC contactless payment ICs

I combine deep hands-on circuit design with system-level thinking and infrastructure development (EDA flows, CAD environments, PDK integration).

Currently working as an independent semiconductor consultant and collaborating with industry and academia.

Open to:

• Principal / Staff RFIC design roles

• IC architecture consulting

• Long-term semiconductor design contracts

• Remote collaboration worldwide

Available for long-term semiconductor consulting and remote RFIC design contracts.