Remote Senior R&D Engineer - RISC-V Matrix Extensions (Italy/Europe based)

Description:

• Axelera AI is seeking a Senior R&D Engineer specializing in systolic multiplier architectures for AI training applications.
• The role involves conducting research and development on systolic multiplier arrays tailored for AI training workloads.
• Responsibilities include evaluating architectural trade-offs such as power, performance, and area (PPA) to optimize designs for training applications.
• The engineer will perform modeling and simulation of systolic arrays to predict performance and suitability for various AI training scenarios.
• The position requires exploring and implementing integration strategies for systolic multiplier architectures into instruction set architectures (ISAs) like RISC-V, ARM (SME), or x86 (AMX).
• The engineer will assess the impact of ISA-level extensions on performance, compatibility, and ease of programming for AI workloads.
• Collaboration with ISA architects is essential to ensure seamless integration and utilization of systolic arrays.
• The role includes critically assessing architectural proposals for systolic arrays and proposing novel improvements or custom implementations.
• The engineer will validate architectural proposals and improvements through rigorous benchmarking and testing.
• Staying updated on advancements in AI hardware and systolic architectures is crucial for informing design decisions.
• Collaboration with hardware and software teams is necessary to align systolic architectures with broader system-level goals.
• Contributions to technical publications, patents, and internal knowledge sharing are expected.

Requirements:

• A Master's or PhD in Computer Engineering, Electrical Engineering, Computer Science, or a related field, focusing on AI hardware or systolic architectures is required.
• The candidate must have expertise in designing, analyzing, and modeling systolic multiplier arrays for AI training, with an understanding of power, performance, and area (PPA) trade-offs.
• Experience in integrating systolic architectures into ISAs like RISC-V, ARM (SME), or x86 (AMX) is essential, along with evaluating ISA-level extension impacts on performance and compatibility.
• The candidate should be skilled in modeling, simulating, and validating systolic arrays for AI workloads and proposing improvements based on performance benchmarks.
• Strong collaboration skills with hardware and software teams to align architectures with system-level goals and contribute to research publications and patents are necessary.
• The ability to work independently on architectural proposals, driving innovation and custom implementations for AI training applications is required.
• Candidates should be willing to work from one of the European offices or remotely, with a preference for those open to relocating to Italy.
• Proficiency in English, both spoken and written, is mandatory.

Benefits:

• Axelera AI offers an attractive compensation package, including a pension plan and extensive employee insurances.
• Employees have the option to acquire company shares.
• The company promotes an open culture that supports creativity and continual innovation.
• Collaborative ownership and freedom with responsibility characterize the team dynamics.
• Axelera AI is committed to equal opportunity and diversity, fostering a warm and inclusive environment for all team members.