Remote Sr Staff Verification Engineer

Description:

• Renesas is seeking a Mixed-Signal Verification Engineer to join the team supporting the development and release of power management ICs for the portable market.
• The role involves ensuring potential products operate as specified, identifying issues, and addressing them before manufacturing.

Requirements:

• Experience with creating or using real-numbered models in modeling languages like SystemVerilog.
• Familiarity with EDA design tools and the Cadence design environment.
• Strong communication, organizational, and teamwork skills, with a proactive approach to task completion.
• Ability to develop tests from datasheets for chip coverage assessment.
• Proficiency in creating and maintaining testbenches and design files for simulation regression runs.
• Capability to delegate tests to verification engineers, troubleshoot issues, and provide technical assistance and mentoring.
• Familiarity with scripting languages such as Makefile, Perl, Tcl, or Python.
• Experience in UVM based verification flow is advantageous.
• Education: BS or MS in Electrical Engineering or equivalent.

Benefits:

• The expected annual pay range for this position is $155,000 - $230,000, with additional bonus opportunities.
• Full range of elective benefits including medical, dental, vision, health savings account, flexible spending accounts, commuter benefits, life insurance, AD&D, and pet insurance.
• Company-paid life insurance, AD&D, LTD, short term medical benefits, paid sick time, holidays, and accrued vacation.
• New employees receive a detailed benefit orientation to understand the various benefits and resources available.